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ExaNeSt

Title
European Exascale System Interconnect and Storage
Funding
EC | H2020 | RIA
Call
H2020-FETHPC-2014
Contract (GA) number
671553
Start Date
2015/12/01
End Date
2019/05/31
Open Access mandate
yes
Data Pilot
yes
Organizations
UMAN, ALLINEA, MDBS, EXACT, VOSYS, ICE, FORTH, Fraunhofer, ES, ARM, UPV, INAF, INFN
More information
Detailed project information (CORDIS)

 

  • The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems

    M. Katevenis; N. Chrysos; M. Marazakis; I. Mavroidis; F. Chaix; N. Kallimanis; J. Navaridas; J. Goodacre; P. Vicini; A. Biagioni; P. S. Paolucci; A. Lonardo; E. Pastorelli; F. Lo Cicero; R. Ammendola;... (2016)
    Projects: EC | ExaNeSt (671553)
    ExaNest is one of three European projects that support a ground-breaking computing architecture for exascale-class systems built upon power-efficient 64-bit ARM processors. This group of projects share an “everything-close” and “share-anything” paradigm, which trims down the power consumption –by shortening the distance of signals for most data transfers– as well as the cost and footprint area of the installation –by reducing the number of devices needed to meet performance targets. In Exa...

    Challenges and Opportunities in Exascale-Computing Interconnects

    Katevenis, Manolis; Chrysos, Nikolaos (2017)
    Projects: EC | ExaNeSt (671553)
    Keynote Talk, given by Manolis Katevenis and Nikolaos Chrysos, at the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS 2016), held in conjunction with the HiPEAC 2016 Conference, Prague, Czech Republic, 18 January 2016.

    Cosmological Simulations in Exascale Era

    Goz, D.; Tornatore, L.; Taffoni, G.; Murante, G. (2017)
    Projects: EC | ExaNeSt (671553)
    The architecture of Exascale computing facilities, which involves millions of heterogeneous processing units, will deeply impact on scientific applications. Future astrophysical HPC applications must be designed to make such computing systems exploitable. The ExaNeSt H2020 EU-funded project aims to design and develop an exascale ready prototype based on low-energy-consumption ARM64 cores and FPGA accelerators. We participate to the design of the platform and to the validation of the prototype...

    "Implementation Notes for the Storage and Data Access Infrastructure", ExaNeSt project Deliverable D4.3

    ExaNeSt Consortium (2017)
    Projects: EC | ExaNeSt (671553)
    In this deliverable of WP4, D4.3 “Implementation Notes for the Storage and Data Access Infrastructure”, we describe the implementation of each software component and tool that was specified in deliverable D4.2: Extensions and enhancements to the common I/O path in Linux with focus on two key areas: (i) supporting protected access to storage devices from user space, i.e. direct access to storage with minimal kernel related overheads; and (ii) enhancements to the access path for memory-m...

    Iris: An optimized I/O stack for low-latency storage devices

    Anastasios Papagiannis; Giorgos Saloustros; Manolis Marazakis; Angelos Bilas (2016)
    Projects: EC | ExaNeSt (671553)
    System software overheads in the I/O path, including VFS and file system code, become more pronounced with emerging low-latency storage devices. Currently, these overheads constitute the main bottleneck in the I/O path and they limit efficiency of modern storage systems. In this paper we present a taxonomy of the current state-of-the-art systems on accelerating accesses to fast storage devices. Furthermore, we present Iris, a new I/O path for applications, that minimizes overheads from system...

    The next Generation of Exascale-class Systems: the ExaNeSt Project

    R. Ammendolay; A. Biagioni; P. Cretaro; O. Frezza; F. Lo Cicero; A. Lonardo; M. Martinelli; P. S. Paolucci; E. Pastorelli; F. Simula; P. Vicini; G. Taffoni; J. Goodacree; M. Lujn; J. Navaridas;... (2017)
    Projects: EC | ExaNeSt (671553)
    The ExaNeSt project started on December 2015 and is funded by EU H2020 research framework (call H2020-FETHPC-2014, n. 671553) to study the adoption of low-cost, Linux-based power-efficient 64-bit ARM processors clusters for Exascale-class systems. The ExaNeSt consortium pools partners with industrial and academic research expertise in storage, interconnects and applications that share a vision of an European Exascale-class supercomputer. Their goal is designing and implementing a physical rac...

    User-Space I/O for $$\mu $$ s-level Storage Devices

    Papagiannis, Anastasios; Saloustros, Giorgos; Marazakis, Manolis; Bilas, Angelos (2016)
    Projects: EC | ExaNeSt (671553)

    Iris

    Papagiannis, Anastasios; Saloustros, Giorgos; Marazakis, Manolis; Bilas, Angelos (2017)
    Projects: EC | ExaNeSt (671553)

    Lightweight and Generic RDMA Engine Para-Virtualization for the KVM Hypervisor

    Angelos Mouzakitis; Christian Pinto; Nikolay Nikolaev; Alvise Rigo; Daniel Raho; Babis Aronis; Manolis Marazakis (2017)
    Projects: EC | ExaNeSt (671553)
    Remote DMA (RDMA) engines are widely used in clusters/data-centres to improve the performance of data transfers between applications running on different nodes of a computing system. RDMAs are today supported by most network architectures and distributed programming models. However, with the massive usage of virtualization most applications will use RDMAs from virtual machines, and the virtualization of such I/O devices poses several challenges. This paper describes a generic para-virtualizat...

    "Census of the Applications", ExaNeSt project Deliverable D2.1

    ExaNeSt Consortium (2016)
    Projects: EC | ExaNeSt (671553)
    In this document, a survey of scientific and technical applications that could be potentially used in the ExaNeSt project are presented and discussed. The applications are playing a central role in ExaNeSt: they are used to identify a set of initial requirements for the design of the platform, and then they are also used to test the infrastructure during all the implementation phases. The selected applications represent the state of the art of HPC computing in different disciplines: Astro...
  • Exanest Exactlab Data Traffic Produced By Lammps Application

    The eXactLab ExaNeSt Team (2017)
    Publisher: Zenodo
    Projects: EC | ExaNeSt (671553)
    LAMMPS is a classical molecular dynamics code that models an ensemble of particles in a liquid, solid, or gaseous state. It can model atomic, polymeric, biological, metallic, granular, and coarse-grained systems using a variety of force fields and boundary conditions This dataset is comprised of traces obtained from application LAMMPS by processing the otf2 output produced by the SCALASCA utility once the LAMMPS code has been instrumented. Specifically, five variants of LAMMPS have been analy...

    Exanest Exactlab Data Traffic Produced By Regcm Application

    The eXactLab ExaNeSt Team (2017)
    Publisher: Zenodo
    Projects: EC | ExaNeSt (671553)
    RegCM4 is a regional climate model based on the concept of one-way nesting, in which large scale meteorological fields from a Global Climatic Model (GCM) run provide initial and time-dependent meteorological boundary conditions for high resolution simulations without any active feedback. This dataset is comprised of traces obtained from application REGCM by processing the otf2 output produced by the SCALASCA utility once the REGCM code has been instrumented. The otf2 data have been processed ...

    Εxanest Infn Data Traffic Produced By Proprietary Dpsnn Application

    Pastorelli E.; Simula F.; Paolucci P.S; and the INFN ExaNeSt team (2017)
    Publisher: Zenodo
    Projects: EC | ExaNeSt (671553), EC | HBP SGA1 (720270)
    DPSNN-STDP is a natively distributed mini-application benchmark representative of plastic spiking neural network simulators. Processes describe synapses in input to cluster of neurons with an irregular interconnection topology, with complex inter-process traffic patterns broadly varying in time and per process. This dataset is comprised of textual data set describing all the details of the inter-processor communication for five different neural network configurations. Each file contains a 3D ...
  • Scientific Results

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    PUBLICATIONS BY ACCESS MODE

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    Publications in Repositories

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