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Samsudin, K.; Cheng, B.; Brown, A.R.; Roy, S.; Asenov, A. (2005)
Publisher: Institute of Electrical and Electronics Engineers
Languages: English
Types: Other
Subjects: TK

Classified by OpenAIRE into

arxiv: Computer Science::Hardware Architecture, Computer Science::Emerging Technologies, Condensed Matter::Mesoscopic Systems and Quantum Hall Effect
The CMOS scaling increases the impact of intrinsic parameter fluctuation on the yield and functionality of SRAM. A statistical circuit simulation framework which can fully capture intrinsic parameter fluctuation information into the compact model has been developed. The impact of discrete random dopants in the source and drain regions on 6T SRAM cells has been investigated for well scaled ultra thin body (UTB) SOI MOSFETs with physical channel length in the range of 10nm to 5nm.
  • The results below are discovered through our pilot algorithms. Let us know how we are doing!

    • 2/1 2.5 1.0 1.5 2.0 Read Time (ns) 3.0 Fig. 4: SRAM read discharge time distribution.
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