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fbtwitterlinkedinvimeoflicker grey 14rssslideshare1
Wang, Xingsheng; Cheng, Binjie; Reid, David; Pender, Andrew; Asenov, Plamen; Millar, Campbell; Asenov, Asen (2015)
Publisher: Institute of Electrical and Electronics Engineers
Languages: English
Types: Article
Subjects:

Classified by OpenAIRE into

ACM Ref: Hardware_PERFORMANCEANDRELIABILITY, Hardware_INTEGRATEDCIRCUITS
In this paper, we present a FinFET-focused variability-aware compact model (CM) extraction and generation technology supporting design-technology co-optimization. The 14-nm CMOS technology generation silicon on insulator FinFETs are used as testbed transistors to illustrate our approach. The TCAD simulations include a long-range process-induced variability using a design of experiment approach and short-range purely statistical variability (mismatch). The CM extraction supports a hierarchical CM approach, including nominal CM extraction, response surface CM extraction, and statistical CM extraction. The accurate CM generation technology captures the often non-Gaussian distributions of the key transistor figures of merit and their correlations preserving also the correlations between process and statistical variability. The use of the hierarchical CM is illustrated in the simulation of FinFET-based SRAM cells and ring oscillators.
  • The results below are discovered through our pilot algorithms. Let us know how we are doing!

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