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Willingham, David J.; Kale, Izzet
Publisher: IEEE
Languages: English
Types: Part of book or chapter of book
Subjects: UOW3
An asynchrobatic system that uses Euclid's algorithm to calculate the greatest common denominator of two numbers is presented. This algorithm is a simple system that contains both repetition and decision, and therefore demonstrates that asynchrobatic logic can be used to implement arbitrarily complex computational systems. Under typical conditions on a 0.35 mum process, a 16-bit implementation can perform a 24-cycle test vector in 2.067 mus with a power consumption of 3.257 nW.
  • The results below are discovered through our pilot algorithms. Let us know how we are doing!

    • Willingham D.J. & Kale I., “Asynchronous, quasi-Adiabatic (Asynchrobatic) Logic for Low-Power very Wide Data Width Applications”, Proc. ISCAS 2004.
    • Willingham D.J. & Kale I., “An Asynchrobatic, radix-four, carry look-ahead adder”, Proc. PRIME 2008, pp 105-108.
    • Muller D.E. & Bartky W.S., “A theory of asynchronous circuits” Proc. Int. Symp. Theory of Switching, pp. 204-243, 1959.
    • Vetuli A., Pascoli S.D. & Reyneri L.M., “Positive Feedback in Adiabatic Logic”, Elec. Lett., 32(20):1867-1869, 26 Sept. 1996.
    • Heller L., Griffin W., Davis J. & Thoma, N., “Cascode voltage switch logic: A differential CMOS logic family”, ISSCC Dig. Tech. Papers, 1984, pp. 16-17.
    • Euclide, ”Elements”, Book VII, John Daye, London, 1570.
    • [10] Sparsø J. & Furber S.B., “Principles of Asynchronous Circuit Design: A Systems Perspective”, Kluwer Academic, 2002, ISBN 0-7923- 7613-7.
  • No related research data.
  • Discovered through pilot similarity algorithms. Send us your feedback.

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