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Ji, Z; Linten, D; Boschke, R; Hellings, G; Chen, SH; Alian, A; Zhou, D; Mols, Y; Ivanov, T; Franco, J; Kaczer, B; Zhang, X; Gao, R; Zhang, JF; Zhang, WD; Collaert, N
Publisher: IEEE
Languages: English
Types: Unknown
Subjects: TK
We present a comprehensive study of ESD reliability (TLP) on planar nMOSFETs with In0.53Ga0.47As as the channel material. Two types of traps are found during ESD stress. They are formed through independent mechanisms: transient Ef-lowering induced pre-existing e-traps discharging in the gate stack and hot hole induced e-traps generation through impact ionization in the InP buffer. These two types of traps explain the observed walk-out of off-state channel leakage current as well as the two-stage current conduction phenomena in the TLP measurement. The generated e-traps are permanent and can introduce detrimental conduction current harmful to the device performance. By properly selecting the buffer material, these defects can be removed.
  • The results below are discovered through our pilot algorithms. Let us know how we are doing!

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