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Types: Conference object
Subjects: supercomputer, low-latency interconnect, Euratom, rack prototype, non-volatile memory, European Union, real HPC applications, Exascale system, Euratom research & training programme 2014-2018, Horizon 2020

The ExaNeSt project started on December 2015 and is funded by EU H2020 research framework (call H2020-FETHPC-2014, n. 671553) to study the adoption of low-cost, Linux-based power-efficient 64-bit ARM processors clusters for Exascale-class systems. The ExaNeSt consortium pools partners with industrial and academic research expertise in storage, interconnects and applications that share a vision of an European Exascale-class supercomputer. Their goal is designing and implementing a physical rack prototype together with its cooling system, the storage non-volatile memory (NVM) architecture and a low-latency interconnect able to test different options for interconnection and storage. Furthermore, the consortium is to provide real HPC applications to validate the system. Herein we provide a status report of the project initial developments.

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Funded by projects

  • EC | ExaNeSt

Related to

  • fet-h2020FET HPC: HPC Core Technologies, Programming Environments and Algorithms for Extreme Parallelism and Extreme Data Applications
  • fet-h2020FET HPC: European Exascale System Interconnect and Storage

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